Field of the Invention
The invention relates to a semiconductor structure manufacturing technique, and more particularly, to a transistor structure in a core circuit and an input/output (IO) circuit.
Description of Related Art
An electronic circuit generally contains a core circuit and an IO circuit. The core circuit and the IO circuit respectively contain a desired metal oxide semiconductor (MOS) transistor. The transistor of the core circuit corresponds to the operating speed of the core circuit, and a faster operating speed is demanded in design. The transistor of an IO circuit is connected to an external circuit and needs to match the external circuit, and therefore in terms of design, the predetermined operating speed of the transistor thereof is slower than the operating speed of the core circuit.
The transistors of the core circuit and the IO circuit contain the same or similar processes or structures in manufacture, and therefore the two transistors are manufactured at the same time. In these similar structures, the gate structures and the strained regions used as the source/drain (S/D) regions in the substrate are, for instance, manufactured in the same step at the same time for transistors with the same conductivity type.
In actuality, based on the size and the target response speed of the transistors respectively for the core circuit and the IO circuit, different design goals are made in consideration for performance matching. In manufacture, the core circuit and the IO circuit are not separately manufactured, and therefore in the same manufacture, the desired target values respectively for the core circuit and the IO circuit are relatively hard to achieve.
In particular, the distance between the source/drain regions and the gates affects the response speed of the transistor. If it is based on the manufacturing conditions of the transistor of the core circuit, then the performance of the transistor of the IO circuit deviates from the design target value, such as the response speed of the transistor is too fast, such that the operation of the overall integrated circuit is flawed in matching.
How to maintain transistor requirements of an IO circuit while manufacturing the transistors of the core circuit and the IO circuit at the same time is a concern of design and manufacture.